Waveform Interpretation needed.

Bias adjustment has a profound effect on the waveform. Loaded, if I go to 616 millivolts the anamoly disappears, that equates to 415 millivolts unloaded.
 
Maybe it is the blob of solder on top of C17L. Sorry, I could not resist.

Chasing a frequency artifact is difficult at best. Do any of the other amps show that bump Lee? I looked at two of my PL400 amps but I could not see anything like you have.

Mark
 
I haven't seen it on any others. I'm leaning towards an out put now.
 
If that blob is all you could find to rib me about, I feel pretty good about that. The bias affecting the waveform leads me to believe the driver or pre-driver is not wanting to bias up, or am I biasing up the wrong tree here?
 
You are only getting this on the zero crossing of the negative half cycle. Tiny blip on the positive going slope. Have you checked for relatively symmetrical bias on both R38 and R39? They should be reasonably close.
 
415 mV is not horrible is it? The book says +0.35 VDC +/- 0.1 VDC. That would be +250 mV to +450 mV, right? You are in there. It might run a bit warm but the distortion would be very low.
 
you are not barking up the wrong tree Lee. When biasing of the output is working properly you should see a smooth waveform at the bottom of R18. Something strange is occurring in your output stages.
 
Joe, is it a good practice to run the bias down to the minimum, say 250 mV and check the waveform for symmetric form? That would be a worst case for transistor turn on, right?
 
I'm running 21194's and MJ15024's. I might try some 21196's if the arrow keeps pointing that way.
 
You should also try the RCA410 driver/MJ21194 or 96 final output combo. The RCA410 devices tend to have higher gain which helps with what you are seeing.
 
Ok Joe, I'll swap out the 24's and give that a check. Hmmmmmm..... might learn something tonight.
 
A blip on both channels almost points to a power problem, eh? There is not much in common with the output circuitry on both channels.

Hmmmmmmm
 
That is not a bad test Mark to confirm relative symmetry in the output stages. I usually match output devices and trust the bias after that. If you have unknown devices in the output stages then that test you do is a good check to do.
 
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