As Lee can tell you, the key to getting the DC Offset low is to match the current gain, or hfe, of two TIS 97 (or TIS 93, they are close) because these transistors are used as a Differential Pair (sometimes called a "Long Tailed" Pair), common emitter configuration in each channel of the Phase Linear amplifier PCB, such as the PL 14A.
The bias point in the Phase Linear configuration is established by ensuring that a relatively constant current flows through the emitter resistor, R6. This is done by using a fairly high value resistor (200K Ohms in our case) or a current source which results in a relatively high voltage across it compared to the input range. This is where the name “long-tailed pair” comes in. With no differential input voltage (in other words, the transistor bases are at the same voltage) the bias current will be split equally between the two transistors. When a differential voltage appears, the current will increase in one transistor and decrease in the other, but their sum will remain constant. The common-mode gain is defined by the matching of the two stages and the “stiffness” of the resistor or current source at the emitter of the two transistors.
We used to buy them by the thousand and spend all night measuring the hfe and creating matching pairs. I think Lee got a pair down to 5mV, installed.